... Introduction to PCI CPU Memory . ... Nonprefetchable 32 bit memory at 0xf7fff000. ... PCI ROM ADDRESS 32bit bit 1131 is the start address of the device 's ROM area. (write bit 1 to enable ROM) PCI MIN GNT 8bit minimal latency time (vendor specific) PCI MIN LAT 8bit maximal latency time (vendor specific) PCI INTERRUPT PIN 8bit This entry denotes the IRQ pin that should be used 1=INTA 2=INTB 0=disabled PCI INTERRUPT LINE 8bit This entry specifies the interrupt line on which the ...
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Ссылки http://mavr.sao.ru/hq/sts/linux/doc/pci/pcip.ps -- 95.5 Кб -- 13.03.2004
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Ссылки http://www.sao.ru/hq/sts/linux/doc/pci/pcip.ps -- 95.5 Кб -- 24.02.2010
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Ссылки http://jet.sao.ru/hq/sts/linux/doc/pci/pcip.ps -- 95.5 Кб -- 24.02.2010 Похожие документы
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