Hamamatsu Photonics manufactures a complete line of Solid State detectors including Photodiodes, photodiode array’s and image sensors (CCD’s). The charge coupled devices (CCD’s) incorporate a full frame transfer (FFT) architecture and is available in front or back illuminated configurations. These are scientific grade CCD’s with low dark current MPP operation, 8 electrons rms readout noise and wide dynamic range. Each photosensitive pixel is 24um square and pixel format ranges from a 532x64 up to 1044x64. The resulting active area is rectangular, ideal for spectrometers and spectroscopy applications.

In general, the photosensitive area of a FFTCCD is completely covered with polysilicon gates for charge transportation. A front illuminated (FI-CCD) device has no response in the UV spectrum, because the polysilicon gates absorb the input light. Absorption losses also occur in the visible spectrum causing a reduction in sensitivity. To enhance the UV response a phosphorus coating (lumogen) can be applied. This is an organic material, which degrades over time with bright UV exposure due to photodecomposition. With lumogen, the quantum efficiency (QE) at 250nm is 7% at 650nm is about 40%. Ask for the S7010/S7011 series.

By flipping the CCD chip over and chemically etching the back surface we avoid absorption losses encountered in the FI-CCD and greatly enhance sensitivity. The photo-generated carriers are collected in the bulk silicon and transported via polysilicon gates. This is called a back-thinned (BT-CCD) device. Hamamatsu’s unique treatment of the back surface yields a device with excellent QE in both UV and visible. The QE at 250nm is 75% and 90% at 650nm. Our backside accumulation process not only enhances sensitivity but also produces superb stability against intense UV radiation. Ask for the S7030/S7031 series.

A nitride layer is patterned on the back surface and used as an etch mask for a deep, anistropic etching process, followed by a finer isotropic etch process. The resulting membrane is approximately 20um thick in the active region and 300mm elsewhere. Such a thin membrane must be handled with the utmost care and supported for assemble. In order to prevent charge trapping of carriers at the back surface of the CCD a backside accumulation technique is needed. Backside accumulation is accomplished using ion implantation followed by a high temperature annealing. Next a thermally grown gate oxide (SiO2) is deposition. Electrical contacts to the device are made via the front surface, near CCD register. In preparation for flip-chip bonding a series of aluminum interconnects are placed on the device and aligned with alumimum patterns on a silicon substrate. Ohmic contact is formed between the thinned CCD chip and the silicon substrate via a series of gold bumps using an thermo-sonic wire bonding machine. To improve cooling efficiency between the substrate and CCD a thermally conductive resin is injected. This sub-assemble is placed on top of a single stage thermoelectric cooler in a custom, hermetic sealed package. Conventional wiring bonding between the substrate and package electrodes (leads) completes the assembly process.

All of our CCD’s can be integrated into a hermetic package with a single or two stage thermoelectric cooler (TEC). Cooling the CCD reduces dark current and extends the dynamic range. With a single stage cooler a delta T of 45deg C is possible. The C7021/C7041 are cooled Multichannel detector heads for FI-CCD and BT-CCD respectively. The readout mode is software controllable. They can be readout in either a line binning mode (1D) or imaging mode (2D). The readout speed and integration times are determined by two external clock signals. The temperature control circuitry holds the CCD chip temperature at a constant –10deg C. For portable instrumentation, where power consumption s of concern, the cooler can be placed in a stand by mode. We also offer a complete evaluation kit including readout electronics, temperature controller, computer interface and LabVIEW drivers. The kit consist of a detector head, analog to digital converter, interface cable assembly and software.