Документ взят из кэша поисковой машины. Адрес оригинального документа : http://www.naic.edu/alfa/galfa/docs/galspect/downconverter/qdb-controller.pdf Дата изменения: Sat Aug 28 04:09:31 2004 Дата индексирования: Sun Dec 23 06:27:52 2007 Кодировка: Поисковые слова: п п п п п п п п п п п п п п п п п п п п п п п п п п п п

The design of GALFA Quadrature Downconverter Controller Board
Pavel Monat, Dan Werthimer, SETI Program, Space Sciences Laboratory, UC Berkeley. 07/27/2004

Specifications:
The GALFA Quadrature Downconverter Controller (QDC) interfaces the GALFA spectrometer computer and the analog QD boards. It is desired that for IF input levels between -25dBm to -10dBm, the output power from the analog QD is constant (about 0dBm). The GALFA spectrometer computer will sense the power level at the output, and using a DAC, it will adjust the gain on the analog QD board. The QDC board is designed to regulate and supply power up to 16 analog QD boards. The QDC board will need to translate RS232 logic levels sent from the computer to TTL logic levels used by the DACs.

Block Diagram and Schematic:
Fig.1 shows the Orcad Capture CIS schematic of QDC board. The CLK and DATA RS232 logic level inputs come through the DSUB-9 connector on pin 4 and 7, respectively. A 10uF capacitor is used to remove the high frequency component in the 5V power supply. A light diode in series with a 150 resistor is used to show that the power is connected to the board.

Figure 1: QDC schematic.

Fig.2 shows the pin configuration and typical operation circuit for MAX203 (through-hole package). Pin 7 is connected to 5V power supply and decoupled with 0.1uF cap. Pins 4 and 19 are connected to CLK and DATA RS232 inputs, respectively. Pins 3 and 20 are the TLL outputs from pin 3 and 20, respectively. Pin 10 is tied to pin 16, pin 11 is tied to pin 15, and pin 12 is tied to pin 17. Pins 6 and 9 are grounded. Pins 1, 2, 5, and 18 are unused. The data sheet for MAX203 can be found at: http://pdfserv.maxim-ic.com/en/ds/MAX200MAX213.pdf .


Figure 2: MAX203 pin-out

Fig. 3 shows the pin-out of MAX521 8-channel DAC. Pin 15 is connected to 5V power-supply and is decoupled using 0.1uF capacitor. Pins 5 and 6 are grounded. Pin 3, 4, 16, 17, and 18 are connected to 1.5V voltage reference that limits the analog output of the DAC to 1.5V (the voltage control range on the analog QD board is 0.2Vmax gain to 1.2Vmin gain). Pin 13 and 14 set the address of the MAX521. The pins 13 and 14 of left MAX521 chip (U3) are grounded (and therefore its address is 00). The pins 13 and 14 of right MAX521 chip (U4) are tied to powersupply (and therefore its address is 11). Pins 1, 2, 9, 10, 11, 12, 19, and 20 are the analog outputs of the MAX521. Each analog output is tied to pin 4 and 7 of the ten pin connector. Table 1 shows the correspondence of 16 analog DAC outputs to 16 ten pin connectors. Pin Schematic MAX521 reference
U3 U3 U3 U3 U3 U3 U3 U3 U4 U4 U4 U4 U4 U4 U4 U4

Net Alias
ctrl1 ctrl0 ctrl4 ctrl5 ctrl7 ctrl6 ctrl3 ctrl2 ctrl9 ctrl8 ctrl12 ctrl13 ctrl15 ctrl14 ctrl11 ctrl10

Schematic Board 10 pin layout/silk screen connector reference reference
J3 J2 J6 J7 J9 J8 J5 J4 J11 J10 J14 J15 J17 J16 J13 J12 0b 0a 2a 2b 3b 3a 1b 1a 4b 4a 6a 6b 7b 7a 5b 5a

Figure 3: MAX521pin-out Table 1: 16 DAC outputs to 16 ten pin connectors' correspondence.

The data sheet to MAX521 can be found

1 2 9 10 11 12 19 20 1 2 9 10 11 12 19 20


at: http://pdfserv.maxim-ic.com/en/ds/MAX520-MAX521.pdf . The 1.5V voltage reference is created using 1.5V precision LM385Z diode from National Semiconductor. The LM385Z diode is reverse biased in series with 440 resistor. A 0.1uF cap is used to cancel high frequency jitter at the output of the voltage reference. Pin 2 is tied t the 440 resistor and 0.1uF capacitor, pin 1 is tied to ground, and pin 3 is left open. The data sheet for LM385Z can be found at: http://space.auburn.edu/CHS/mag/LM185-ADJ.pdf .

Layout:
Fig. 4 shows QAC board layout. All chips have DIP package and all passive parts are through hole. All decoupling capacitors are placed as close to power-supply pins as possible. The positive power supply is tied to 150x150 mil2 square pad. The negative ground it tied to 150 mil diameter round pad. The pads are separated by 100 mils. The power is routed to chips and 10 pin connectors via 80 mil traces. The DAC output voltages are routed via 25 mil trances to 10 pin connectors. Top copper layer is used for vertical traces, and bottom copper layer is used for horizontal traces. The MAX521 chips were bought from Newark Electronics. The MAX203 chips were bought from Avnet. The final board dimensions are 3.4 by 4.3 inches.

Figure 4: QDC layout

If you have any questions about this report, please e-mail me: pmonat@umich.edu