Документ взят из кэша поисковой машины. Адрес оригинального документа : http://www.eso.org/projects/www.eso.org.projects.ngc/Hardware/2005_06_24-Reyes-SDW2005NGCforCCDsandAO.pdf Дата изменения: Mon Mar 12 16:35:40 2007 Дата индексирования: Sun Apr 10 23:50:10 2016 Кодировка: Поисковые слова: п п п п п п п п п п п п п п п п

NGC FRONT-END FOR CCDS AND AO APPLICATIONS

Javier Reyes, Mark Downing, Leander Mehrgan, Manfred Meyer and Ralf Conzelman
European Southern Observatory, Karl-Schwarzschild-Str. 2, 85748 Garching, Germany

Abstract:

The New General detector Controller (NGC) at ESO aims at covering optical, infrared and wavefront sensing applications with a single controller. However, the detector requirements for optical, infrared and adaptive optics (AO) have clearly diverged more and more in the past years presenting a challenge in the design of the electronics. This paper extends the description of the general architecture of the controller (cf. these proceedings Meyer et al.) towards the specific front-end electronics to drive and read-out CCDs both for optical instruments and AO applications. In addition, the adaptation of the NGC frontend to the future ESO CCD head for AO and the control of the L3 devices is presented.

Key words: Adaptive optics, sensing applications, real time computer, RocketIO serial link, L3CCD, Xilinx Virtex-II Pro.

1.

INTRODUCTION

For the first time at ESO we try not only to combine forces and resources to control IR and CCDs focal planes with a universal controller but also to cover adaptive optics (AO) applications with the same controller. The challenges of the design results from the choice of L3CCD technology for the AO systems of VLT second generation instruments and the limited volume of the AO head [1]. The new controller at ESO will therefore have to drive seamlessly both scientific applications, e.g. Hawaii-2RG and e2V or MIT CCDs, and sensing applications heads, e.g. L3Vision CCDs or OTAs.


2

Javier Reyes, Mark Downing, Leander Mehrgan, Manfred Meyer and Ralf Conzelman

2.

NGC FOR SCIENTIFIC APPLICATIONS

Figure 1 shows a typical connection of NGC to a cryostat on scientific applications. The front-end electronics is based on a standard 19-inch rack hosting 6U-size boards with compact-PCI connectors for the analog signals (video input, clock and bias outputs) and high-speed Erni ERmet ZD connectors for the board-to-board communication via the RocketIO serial links [6] [7].

Figure 1. NGC for scientific applications.

3.

NGC FOR SENSING APPLICATIONS

By contrast, Figure 2 shows how NGC will be connected to a head for AO. On that figure, the same Linux PC is used but the functionality of the front-end electronics shown in Figure 1 has been reduced to a volume of only 100 x 200 x 40 mm. The complete NGC front-end electronics needed to drive the L3Vision CCDs will be repackaged in two Eurocard size PCBs (160 x 100 mm) connected via high-speed serial links at 3.125Gbps. The connection of the AO head to the back-end electronics is done through optical fiber and via the Front Panel Data Port (FPDP) protocol [8].


NGC Front-end for CCDs and AO applications

3

In the configuration of Figure 2 the AO head sends the pixel data directly to the real time computer for number crunching. However, another possible alternative to connect the AO head to the RTC is shown in Figure 3. On this figure the back-end computer receives the pixel data from the front-end head and transmits it to the RTC for processing. The RTC is a multi-processor VME based board with a commercial FPGA03 piggy-back daughter card for pre-processing, image calibration and centroiding [8].

Figure 2. NGC for sensing applications. Direct connection of the AO head to the Real Time Computer.

Figure 3. NGC for sensing applications. Second alternative. Pixel data is sent to back-end computer. Back-end computer sends the data to the RTC.


4

Javier Reyes, Mark Downing, Leander Mehrgan, Manfred Meyer and Ralf Conzelman

4.

ESO HEAD FOR ADAPTIVE OPTICS

We plan to condense the functionality of the NGC front-end in two Eurocard PCBs. See Figure 4. These PCBs will contain the high-speed highvoltage clock driver to control the L3Vision chip, the 8 fast 14-bit ADCs (for scientific applications we are currently using 18-bit ADCs) and a Xilinx Virtex-II Pro as the only digital electronics on the board. The AO head must necessary be compact and the electronics in close proximity of the CCD to avoid reflections on the high-speed clock lines driving the chip. Similarly, the fast ADCs input tracks must be shielded and as close as possible to the output ports of the CCD to avoid pick-up noise and interference from the high-speed electronics in the surrounding. Specially challenging is the generation of phase voltages close to 50V and currents peaks of several amps [5].

Figure 4. New ESO head for Adaptive Optics.

From an electronics point of view, the challenges in driving an L3CCD can be summarized as in [2], [3]: · · · · · Fast reading of up to 10 Mlines per second, 8 output ports, 14-bit ADCs, Frame rate of up to 1.2kHz, High-voltage, high-speed clock driver generation, Sampling of high-speed video with RON < 1 (0.1) e-/pixel.


NGC Front-end for CCDs and AO applications

5

5.

NGC FRONT-END FOR CCDS

ESO aims at reading CCDs by applying multiple sampling rather than any other more laborious analog technique like dual-slope or clamp-andsample. However the performance obtained with multiple sampling, mainly read-out noise, is still uncertain and needs to be measured. In order to validate multiple sampling the read-out noise must be in the order of 2 to 2.5 electrons at 50kpx/s; 4 to 4.5 electrons at 225kpx/s and about 6 electrons at 625kpx with an e2V CCD-44 chip. If for some reason multiple sampling does not achieve the desired performance, we plan to develop a dedicated board for CCDs with dual-slope or clamp-and-sample as we currently have in FIERA.

6.

CONCLUSIONS

The new controller at ESO, NGC, covers indistinguishably with the same controller and the same core electronics both scientific applications and sensing applications. The design challenges of driving L3Vision CCDs are various an intrinsic to the characteristics of the new chip. Moreover, the size available for the electronics inside the head constraints additionally the design. NGC plans to read-out CCDs by using digital multiple sampling but the performance is still to be validated. Acknowledgement The authors would like to thank Craig Mackay, Simon Tulloch and Jean-Luc Gach for showing their insightful views on the electronics for L3Vision CCDs.
References [1] Mark Downing et al: A dedicated L3CCD for Adaptive Optics applications, SDW2005. [2] Craig Mackay: Near Diffraction Limited Visible Imaging on 10m class telescopes, SDW2005. [3] Manfred Meyer et al: ESO's New General detector Controller, SDW2005. [4] Simon Tulloch: L3CCD Wavefront Sensor Developments at the ING, SDW2005. [5] Jean-Luc Gach: A dedicated controller for adaptive optics L3CCD developments, SDW2005. [6] High-speed connector information http://www.erni.com/. [7] RocketIO information at Xilinx web site. http://www.xilinx.com/products/virtex2pro/rocketio.htm. [8] Transtech FPGA03 board: http://www.transtech-dsp.com/io/pmc-fpga03.asp