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Cryogenic Phase Detector for Superconducting Integrated Receiver
Andrey Khudchenko, Valery Koshelets, Pavel Dmitriev Andrey Ermakov
Institute of Radio Engineering and Electronics (IREE), Moscow, Russia

Pavel Yagoubov
SRON Netherlands Institute for Space Research, the Netherlands
in collaboration with

Oleksandr Pylypenko

State Research Center of Superconducting Electronics "Iceberg", Kyiv, Ukraine

August 28, 2006

ASC-2006, Seattle - CPD

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Superconducting Integrated Receiver (SIR)
APPLICATIONS
· · · · · · · · Airborne Receiver for Atmospheric Research and Environmental Monitoring; Radio Astronomy Large Imaging Array Receiver Laboratory MM & subMM Spectrometer

STATE OF THE ART
Single chip Nb-AlOx-Nb SIS receivers with superconducting FFO has been studied at frequencies from 100 to 700 GHz A DSB receiver noise temperature as low as 100 K has been achieved at 500 GHz 9-pixel Imaging Array Receiver has been successfully tested Phase Locked operation from 550 to 700 GHz TELIS - balloon-borne spectrometer, the qualification flight is foreseen in 2007
Tuesday, August 29, 4:00pm; Report 2EY01
August 28, 2006 ASC-2006, Seattle - CPD 2


Spectra of the Frequency and Phase Locked FFO
-30 IF Output Power (dBm) AFrequency Locked FFO LW = 3.5 MHz

-40

B - Phase-Locked FFO SR = 70 %

B
-50

A

-60

597.36

597.38

597.40

597.42

597.44

FFO Frequency (GHz)
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Spectra of the phase-locked FFO for different length of the PL loop
FFO frequency 648 GHz; free-running LW = l3.4 MHz; initial SR = 67 % Extra Cable : 2 3 4 5 6 7 8 m m m m m m m

August 28, 2006

ASC-2006, Seattle - CPD

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SR value on the length of the extra cable added to the PL loop
100 80 Spectral Ratio, SR (%%)

60

40
703 685 648 540 GH GH GH GH z; z; z; z; LW LW LW LW =1.7 MHz =2.2 MHz =3.4 MHz =4.2 MHz Linear Fit

20

Min PLL cable length is 2 m

0

-2

0

2

4

6

8

PLL Cable Length (m)
August 28, 2006 ASC-2006, Seattle - CPD 5


Ratio of PL and total FFO power (SR) on FFO LW
1.0 0.8 Spectral Ratio 0.6 0.4 0.2 0.0
Lorentz BW=5 MHz Lorentz BW=15 MHz Lorentz BW=50 MHz PLL for TELIS PLL BW=6 MHz - var

1

10

100

Free running 3 dB FFO linewidth (MHz)
August 28, 2006 ASC-2006, Seattle - CPD 6


Block-diagram for the Cryogenic Phase Detector Tests
f1, f2 = 0.5 В 5 GHz
Microwave output (50-900 MHz)

Nb-AlOx-Nb; S
August 28, 2006 ASC-2006, Seattle - CPD

SIS

=

1 В 2 µm

2

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SIS IVCs at difference settings of two synthesizers
300 250
SIS Current (µA)
Autonomous Only Synth "1" "2" in phase with "1" "2" in anti-phase with "1" Phase response

200 150 100 50 0

SIS IC = 0 Frequency 5 GHz

1

3 2 4 5

P1 = 0.3 µ W P2 = 0.1 µ W

-50

0

1

2

3

4

5

SIS Voltage (mV)
August 28, 2006 ASC-2006, Seattle - CPD 8


Dependence of SIS current on the phase difference between two 5 GHz signals

Vsis = 2.55 mV Ig = 0.15 mA
August 28, 2006 ASC-2006, Seattle - CPD 9


SIS Phase Detector output at DC and IF; two different frequencies applied
f1 = 5 GHz; f1 - f2 = 37 Hz f1 - f2 = 0 В 1000 MHz

Vsis = 2.55 mV
August 28, 2006 ASC-2006, Seattle - CPD 10


SIS current vs. applied power
Total power P applied to the SIS is a coherent combination of incident signals:

P = P1 + P 2 + 2 P1P 2 cos ,
In-phase:
100

­ phase difference between two signals

P( = 0) = P1 + P2
SIS current (µA)

80

60

40
S ynt hesizer f r equency = 4 G H z S IS v o lt age = 2.55 m V

In anti-phase:

20

P( = 180°) = P1 - P2

0 0.00

0.01

0.02

0.03

0.04

0.05

0.06

Am plit ude, S Q R T ( W )

August 28, 2006

ASC-2006, Seattle - CPD

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Block diagram of the setup for CPD/FFO test
Spectrum Analyzer Room Temperature PLL system 500 ­ 700 GHz

18 GHz

400 MHz

FFO T = 4. 2 K LP Filter 100 MHz

Harmonic SIS-Mixer Cryogenic Phase Detector
Reference Signal 400 MHz

HEMT Amplifier 1 HEMT Amplifier 2

CPD Loop length is 1.6 m
12

August 28, 2006

ASC-2006, Seattle - CPD


Down-converted spectra of the FFO operating at 600 GHz and locked by CPD and RT PLL
-20 -25
Frequency lock Cryo PLL (gain 1) Cryo PLL (gain 2) R oom tem p. PLL

curve "1" ­ frequency locked, FFO LW = 2.6 MHz "2", "3" ­ phase locked by CPD, SR = 80%;

Power (dBm)

-30 -35 -40 -45 -50
3

1 2

4

"4" - ­ phase locked by room -55 temperature PLL, 350 360 370 380 390 400 410 420 430 440 450 SR = 83.5%
Frequency (M Hz)

August 28, 2006

ASC-2006, Seattle - CPD

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Phase noise of the FFO operating at 600 GHz (free-running linewidth = 2.6 MHz)
-4 0
C r y o geni c P has e D e t e c t or R o om T e m p er at ur e P L L

-5 0

Phase Noise (dBc/Hz)

-6 0

-7 0

-8 0

-9 0

10

100

1k

1 0k

100k

1M

10M

1 00M

O f fs e t fr o m C a r r i e r (H z )

Loop Filter and DC-100 MHz amplifier between CPD and FFO are needed
August 28, 2006 ASC-2006, Seattle - CPD 14


Down-converted spectra of the FFO phase-locked by CPD only

August 28, 2006

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Block diagram of "fully" superconducting integrated receiver with CPD
Spectrum Analyzer 4 GHz

500 ­ 700 GHz

T = 4. 2 K SIS mixer antenna FFO

18 GHz

Harmonic SIS-Mixer Cryogenic Phase Detector
Reference Signal 4 GHz

SQUID Amplifier

Fluxonic Amplifier with Loop Filter

HEMT Amplifier

August 28, 2006

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Conclusion
· New superconducting element, a cryogenic phase detector (CPD) has been proposed and successfully tested. · SIS junction can operate as a phase detector with reasonably large output current · Sinusoidal response of the CPD has been measured at the variation of the phase shift between the input signals · Obtained data demonstrate that CPD intrinsically could operate with effective bandwidth more than 100 MHz · Phase locking of an FFO by CPD with spectral ratio as high as 80 % has been demonstrated in the preliminary experiments · Practical application of the CPD looks especially promising for the development of SIR arrays
August 28, 2006 ASC-2006, Seattle - CPD 17