Документ взят из кэша поисковой машины. Адрес оригинального документа : http://www.arcetri.astro.it/irlab/fasti/description.html
Дата изменения: Thu Jul 28 18:23:28 2005
Дата индексирования: Tue Oct 2 11:53:07 2012
Кодировка:

Поисковые слова: п п п п п п п п п п п п п п п п
Fasti Rationale




Fasti Project Description

Fasti is an innovative design for infrared detector control.

Some recent technological advances enable us to propose a controller for DRO array detectors (for example near IR HgCdTe detectors) which is designed to overcome the difficulties we found in commercial electronics. Named Fasti, it is meant to be a "light" electronic system, which is modular, flexible, extendible, and avoids obsolescence as much as possible. The design does not constrain the downhill controlling computer: Fasti is seen as a peripheral through a network connection.

The basic ideas of the proposed design are:

We developed a design which fits all these requirements, and we are now in the phase of building a prototype of the critical subsystems. We present here the general layout and the driving ideas.

Structure Description

Fasti has a modular design, so each building block can be described separately. Each block has a specific and limited task, so it can be implemented by commercial boards when they are available, with no need to use a specific brand or manufacturer and the possibility to modify it with minimum impact on other subsystems.

The building blocks of Fasti are:

Of these blocks, only the waveform generator, the analog interface and the data conversion subsystem are custom built, all other parts are commercially available.

The Waveform Generator

The flexible waveform generator is a custom part and we are building the prototype. It is based on a specialised micro-controller, where the waveform definition is realised by means of a program in a pseudo assembler language, developed for this purpose, which give a great deal of flexibility. This block can generate not only the standard waveforms for reading the full array, but also arbitrary sub-array scan patterns. It can be reprogrammed in seconds, and hold four different clocking schemes, which can be selected on a per integration basis. It is composed of three parts:

  1. a serial line interface, which gives a complete control of local operations to an external computer, by changing the appropriate code.
  2. a sequence generator, the specialised microprocessor, with its own data and program area.
  3. a deep blocking FIFO to ensure an uninterrupted data flow.

The block is implemented at present on 2 Xilinx XC95288 chip with some external memory, but, being 'a conceptual design', it can be easily transferred to newer devices of the same or other family, avoiding a obsolescence for a long time.

The Global Controller

Inside Fasti there is a central controller for start-up, general housekeeping, global control of operations (start integrations for example), data collection, formatting and buffering, or for data pre-processing when needed.

In the present design all this is realized with a disk-less embedded computer, using an Intel or Alpha family CPU and a number of commercial boards. There are many advantages in this choice: it is very flexible and its behaviour can be easily changed, it is fast and capable of substantial data pre-processing, it has plenty of built-in or easily available interfaces, it is much cheaper compared to alternate solutions based on custom interface adapters, it is seen by the instrument controller computer as a socket in a standard (or fast) Ethernet connection, giving no constraints on it, it is scalable and can be replaced with similar models (hopefully more powerful) without big modifications to the existing software.

The global requirements on this part are:

The serial bus

All the low speed communication inside Fasti are routed through a serial bus. This approach gives us the possibility to use a simple and widely accepted standard for communications, and to use all commercially available parts.

The bus chosen for the initial version of Fasti is the old RS232 serial bus. Though not so fast, and lacking some forms of data integrity check, this bus is so widely used to be nearly unavoidable. Through it, we control the waveform generator, the motor controllers, all the sensors and actuators.

In the near future some viable competitors can be seen, and we will chose between staying with RS232 and switching to Can-Bus, STD-bus, or others; we underline again that these upgrades are not too heavy to be accomplished.

The Parallel Interface

To get data fast enough, the central controller need a fast parallel interface enabling to get more than 2-4 megasamples/sec from the A/D stage. Some commercial board level solutions exist, and we choose a National Instrument 6533 PCI-DIO, but also other boards from different vendors are suitable, provided a good device driver exists.

The Fast Parallel Link

In the present design the global controller is located near the conversion subsystem, at the focal plane, so the interconnection can be a shielded flat cable (less than a meter long), but, in the future, we can drop this requirement, and accommodate a fast, fiber optic based, link between the two parts.

The Conversion Subsystem

This is the second important custom part. This section mainly consists of a small number (4 for NICMOS3 and Hawaii) of analog to digital converters and some glue logic. The conversion is started on the synchronization pulse from the waveform generator. The simplest implementation consists of a 16-bit converters array, and in this form it can probably be found on the market. We are developing a system based on an idea which proves successfully in other instruments (for instance the MPIFR-Bonn speckle camera). We will use fast 14 bit converters to digitize each pixel a power of 2 times (4-16) and then we will average data with a programmable logic adder. This will give us a gain in signal-to-noise ratio, and a clear gain in system dimension and cost. This part, under development, will be also controlled by means of the serial bus.

The Analog Interface

The analog design of Fasti is partially inherited from NICS electronics. It consists mainly of the generation of few bias levels, of level shifting of digital clocks and of conditioning of detector output. This part should raise no problems and will be implemented in the first prototype.

The Housekeeping Devices

For all the trivial housekeeping we plan to use commercially available items. This portion can include motor controllers, temperature and pressure meters, temperature controllers, position sensors, positioners, and so on. All these devices can be controlled by means of a serial bus. The RS232 interface is generally used, giving us an easy trail to Fasti integration.



Ultima modifica:
19/09/00


Back one page Labir Home