As discussed above, it is common practice to express CCD noise as the square root of the product of the noise level (spectral density) and an equivalent noise bandwidth. By definition, a low value (better sensitivity) can be obtained in two ways: 1) a low noise spectral density, and 2) a small equivalent noise bandwidth.

For the reasons described in the section above, we are rapidly approaching the limits to decreasing the noise spectral density of on-chip CCD amplifiers using smaller amplifier geometries. For this reason, PixelVision, Inc. has focussed on producing CCD designs with multiple output amplifiers to reduce the noise equivalent bandwidth. The ever-increasing density of commercially available signal processing electronics, which makes the integration of CCDs with a large number of output amplifiers realizable, supports this approach.

Our testbed for optimizing multiple output CCDs is our ADAPTIII CCD – a very high frame rate (10,000 frames per second), low noise (less than 3 electrons rms.), back illuminated CCD designed for adaptive optics and wavefront sensing applications. The imaging area consists of nominally 80 x 80, thirty-six m m square pixels. It utilizes full frame transfer architecture with an additional nominal 80 rows in the storage region. To achieve low noise at high speeds, 40 on-chip amplifiers are used. The signal charge from every two columns is mixed together into one output amplifier. Thus, the 40 output amplifiers operate in parallel to provide high frame rates at very low noise operation. Each amplifier senses first the charge from one column, then the charge from the other.

The specifications of the PixelVision, Inc. ADAPTIII CCD are shown below:

Table 4-1. ADAPTIII Architecture and Performance

The purpose of this set of measurements was to (1) verify functionality of the back-illuminated design, (2) optimize operating voltages, and (3) measure performance parameters. Successful demonstration of all 40 amplifiers, all in close proximity to one another, and operating with a common set of bias lines and signal chain electronics, significantly reduces risk of future, large area, multiple output CCD designs.

In addition to the 40 output amplifiers, the ADAPTIII CCD also has a conventional serial register adjacent to the imaging area. This register was used to verify the CCD cosmetic quality. The CCD was found to have no blemishes greater or less than +/- 20% of the average response at an illumination equivalent to half of the pixel full well value.

To find the optimum ADAPTIII amplifier operating voltages, a representative amplifier of the 40 (output 11) was characterized. The voltage optimization technique used is described in Section 5.0 and is shown in Figures 5.2-1 and 5.2-2. The amplifier threshold was measured to be 14.5 volts. Charge Transfer Efficiency (CTE) was verified using an Fe55 x-ray source. The measurement was also used for gain calibration.

Figure 4-1 shows readout noise plotted in electrons (rms.) for each of the forty amplifiers. As can be seen from the plot, all forty of the ADAPTIII CCD amplifiers operate with less than 4 electrons rms. noise. The conversion gain of the amplifiers was found be approximately 2.0 m V/electron.

Figure 4-2 shows a plot of signal versus exposure time. To make these measurements, increasing the exposure time under constant illumination flux density increased the input illumination. As can be seen from the plot, signal increases linearly up to at least 140,000 electrons, at which point overflow of the adjacent pixels causes the shot noise to decrease as a function of increased light exposure.